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systems analysis and design

Questions and Answers of Systems Analysis And Design

10. If memory is 16-way interleaved, it means memory is implemented using 4 banks (because 24 =16).
9. The length of a word determines the number of bits necessary in a memory address.
8. If a computer uses microprogrammed control, the microprogram determines the instruction set for the machine.
7. An assembler is a program that accepts a symbolic language program and produces the binary machine language equivalent, resulting in a one-to-one correspondence between the assembly language
6. MARIE has a common bus scheme, which means a number of entities share the bus.
5. The MAR, MBR, PC, and IR registers in MARIE can be used to hold arbitrary data values.
4. A two-pass assembler generally creates a symbol table during the first pass and finishes the complete translation from assembly language to machine instructions on the second.
3. Registers are storage locations within the CPU itself.
2. A branch instruction changes the flow of information by changing the PC.
1. If a computer uses hardwired control, the microprogram determines the instruction set for the machine. This instruction set can never be changed unless the architecture is redesigned.
64. The PC ← PC + 1 microoperation is executed at the end of every fetch cycle (to prepare for the next instruction to be fetched). However, if we execute a Jump or a JumpI instruction, the PC
63. Which control signals should contain a 1 for each step in executing the StoreI instruction? Step Fetch RTN Time P5 P4 P3 P2 P Po C IncrPC M MW LALT MAR PC To IR M [MAR] T PC PC + 1 T Decode MAR
62. Which control signals should contain a 1 for each step in executing the JumpI instruction? Step RTN Time P5 P4 P3 P2 P Po Cr IncrPC M, Mw LALT Fetch MAR PC To IR+M [MAR] T Decode IR[15-12] - PC
61. Pick an architecture (other than those covered in this chapter). Do research to find out how your architecture deals with the concepts introduced in this chapter, as was done for Intel and MIPS.
60. Would you recommend a synchronous bus or an asynchronous bus for use between the CPU and the memory? Explain your answer.
59. Using Figure 4.23 as a guide, write the binary microcode for MARIE’s Add instruction. Assume that the microcode begins at instruction line number 01101002.
58. Using Figure 4.23 as a guide, write the binary microcode for MARIE’s Load instruction. Assume that the microcode begins at instruction line number 01100002.
57. Continuing from exercise 56, write the microcode for the jump table for the MARIE instructions for Jump X, Clear, and AddI X. (Use all 1s for the Destination value.)
56. Using the coding given in Table 4.9, translate into binary the mnemonic microcode instructions given in Figure 4.23 for the fetch–decode cycle (the first nine lines of the table).
55. Draw the timing diagram for MARIE’s AddI instruction using the format of Figure 4.16.
54. Draw the timing diagram for MARIE’s Subt instruction using the format of Figure 4.16.
53. Draw the timing diagram for MARIE’s Load instruction using the format of Figure 4.16.
52. Building on the idea presented in exercise 51, suppose that MARIE has a hardwired control unit and we decide to add a new instruction that requires 8 clock cycles to execute. (This is one cycle
51. Suppose you are designing a hardwired control unit for a very small computerized device. This system is so revolutionary that the system designers have devised an entirely new ISA for it.Because
50. Suppose some hypothetical system’s control unit has a ring (cycle) counter consisting of some number of D flip-flops. This system runs at 1GHz and has a maximum of 10
49. The table in exercise 47 provides a summary of MARIE’s datapath control signals. Using this information, Table 4.9, and Figure 4.20 as guides, draw the control logic for MARIE’s StoreI
48. The table in exercise 47 provides a summary of MARIE’s datapath control signals. Using this information, Table 4.9, and Figure 4.20 as guides, draw the control logic for MARIE’s JumpI
47. The table below provides a summary of MARIE’s datapath control signals. Using this information, Table 4.9, and Figure 4.20 as guides, draw the control logic for MARIE’s Load instruction.
46. Draw the connection of MARIE’s PC to the datapath using the format shown in Figure 4.15.
45. Suppose we add the following instruction to MARIE’s ISA:JumpIOffset X This instruction will jump to the address calculated by going to address X, then adding the value found there to the value
44. Suppose we add the following instruction to MARIE’s ISA:JumpOffset X This instruction will jump to the address calculated by adding the given address, X, to the contents of the accumulator.
43. Suppose we add the following instruction to MARIE’s ISA:IncSZ Operand This instruction increments the value with effective address “Operand,” and if this newly incremented value is equal to
42. Provide a trace (similar to the one in Figure 4.14) for Example 4.4.
41. Provide a trace (similar to the one in Figure 4.14) for Example 4.3.
40. Write a MARIE program that performs the three basic stack operations: push, peek, and pop (in that order). In the peek operation, output the value that’s on the top of the stack. (If you are
39. MARIE saves the return address for a subroutine in memory, at a location designated by the JnS instruction. In some architectures, this address is stored in a register, and in many it is stored
38. More registers appear to be a good thing, in terms of reducing the total number of memory accesses a program might require. Give an arithmetic example to support this statement. First, determine
37. A linked list is a linear data structure consisting of a set of nodes, where each one except the last one points to the next node in the list. (Appendix A provides more information about linked
36. Write a MARIE subroutine to subtract two numbers.
35. Write a MARIE program using a loop that multiplies two positive numbers by using repeated addition. For example, to multiply 3 × 6, the program would add 3 six times, or 3 + 3 + 3 + 3 + 3 +3.
34. Write the following code segment in MARIE assembly language. (Hint: Turn the for loop into a while loop.) Sum = 0; for X 1 to 10 do Sum = Sum + X;
33. Write the following code segment in MARIE assembly language: X = 1; while X < 10 do X = X + 1; endwhile;
32. Write a MARIE program to evaluate the expression A × B + C × D.
31. What are the potential problems (perhaps more than one) with the following assembly language code fragment (implementing a subroutine) written to run on MARIE? The subroutine assumes the
30. Write the following code segment in MARIE’s assembly language: if x
29. Write the following code segment in MARIE’s assembly language: if X1 then Y = X + X; X = 0; endif; Y = Y + 1;
28. Write the assembly language equivalent of the following MARIE machine language instructions:a) 0000010111000000b) 0001101110010010c) 1100100101101011
27. Write the assembly language equivalent of the following MARIE machine language instructions:a) 0111000000000000b) 1011001100110000c) 0100111101001111
26. Given the instruction set for MARIE in this chapter, do the following.Decipher the following MARIE machine language instructions (write the assembly language equivalent):a) 0010000000000111b)
25. Consider the MARIE program below.a) List the hexadecimal code for each instruction.b) Draw the symbol table.c) What is the value stored in the AC when the program terminates? Hex Address Label
24. Consider the MARIE program below.a) List the hexadecimal code for each instruction.b) Draw the symbol table.c) What is the value stored in the AC when the program terminates? Hex Address Label
23. What are the contents of the symbol table for the preceding program?
22. List the hexadecimal code for the following program (hand assemble it). Hex Address Label Instruction 100 LOAD A 101 ADD ONE 102 JUMP S1 103 S2, ADD ONE 104 STORE A 105 HALT 106 S1, ADD A 107
21. Explain why, in MARIE, the MAR is only 12 bits wide and the AC is 16 bits wide. (Hint:Consider the difference between data and addresses.)
20. Combine the flowcharts that appear in Figures 4.11 and 4.12 so that the interrupt checking appears at a suitable place.
19. Explain the steps in the fetch–decode–execute cycle. Your explanation should include what is happening in the various registers. 10-bit address a) 2 bits for chip select 8 bits for address on
18. Given a memory of 2048 bytes consisting of several 64 × 8 RAM chips, and assuming byteaddressable memory, which of the following seven diagrams indicates the correct way to use the address bits?
17. You and a colleague are designing a brand new microprocessor architecture. Your colleague wants the processor to support 509 different instructions. You do not agree, and would like to have many
16. Suppose the RAM for a certain computer has 256M words, where each word is 16 bits long.a) What is the capacity of this memory expressed in bytes?b) If this RAM is byte addressable, how many bits
15. Assume a 220 byte memory.a) What are the lowest and highest addresses if memory is byte addressable?b) What are the lowest and highest addresses if memory is word addressable, assuming a 16-bit
14. A digital computer has a memory unit with 32 bits per word. The instruction set consists of 110 different operations. All instructions have an operation code part (opcode) and two address
13. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address
12. Suppose we have 1G × 16 RAM chips that make up a 32G × 64 memory that uses high interleaving. (Note: This means that each word is 64 bits in size and there are 32G of these words.)a) How many
11. Redo exercise 10 assuming a 16M × 16 memory built using 512K × 8 RAM chips.
10. Suppose that a 2M × 16 main memory is built using 256K × 8 RAM chips and memory is word addressable.a) How many RAM chips are necessary?b) If we were accessing one full word, how many chips
9. How many 256x8 RAM chips are needed to provide a memory capacity of 4096 bytes?a) How many bits will each address contain?b) How many lines must go to each chip?c) How many lines must be decoded
8. Suppose we have 4 memory modules instead of 8 in Figures 4.6 and 4.7. Draw the memory modules with the addresses they contain using:a) High-order interleavingb) Low-order interleaving
7. Redo Example 4.1 using high-order interleaving instead of low-order interleaving.
6. How many bits are required to address a 1M × 8 main memory ifa) main memory is byte addressable?b) main memory is word addressable?
5. How many bits are required to address a 4M × 16 main memory ifa) main memory is byte addressable?b) main memory is word addressable?
4. How many bits would you need to address a 2M × 32 memory ifa) the memory is byte addressable?b) the memory is word addressable?
3. Explain what the CPU should do when an interrupt occurs. Include in your answer the method the CPU uses to detect an interrupt, how it is handled, and what happens when the interrupt has been
2. How is the ALU related to the CPU? What are its main functions?
1. What are the main functions of the CPU?
41. Name four Intel processors and four MIPS processors.
40. How does Intel’s architecture differ from MIPS?
39. Compare CISC machines to RISC machines.
38. What is a stack? Why is it important for programming?
37. Explain the difference between hardwired control and microprogrammed control.
36. Provide a trace (similar to the one in Figure 4.14) for Example 4.1.
35. What is an embedded system? How does it differ from a regular computer?
34. Explain how an assembler works, including how it generates the symbol table, what it does with source and object code, and how it handles labels.
33. How does interrupt-driven I/O work?
32. Explain the steps of the fetch–decode–execute cycle.
31. How does a microoperation differ from a regular assembly language instruction?
30. Is a microoperation the same thing as a machine instruction?
29. What is the significance of RTN?
28. How does a machine language differ from an assembly language? Is the conversion one-to-one (one assembly instruction equals one machine instruction)?
27. Explain how each instruction in MARIE works.
26. What is an opcode?
25. Explain the functions of all of MARIE’s registers.
24. Why is it that if MARIE has 4K words of main memory, addresses must have 12 bits?
23. How does a maskable interrupt differ from a nonmaskable interrupt?
22. Describe how an interrupt works, and name four different types.
21. List and explain the two types of memory interleaving and the differences between them.
20. Why is address alignment important?
19. Explain the difference between byte addressable and word addressable.
18. What is the difference between a byte and a word? What distinguishes each?
17. Explain the difference between memory-mapped I/O and instruction-based I/O.
16. What is the function of an I/O interface?

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