Determine the propagation delay and contamination delay of the circuit in Figure 2.84. Use the gate delays
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Determine the propagation delay and contamination delay of the circuit in Figure 2.84. Use the gate delays given in Table 2.8.
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Table 2.8 Gate delays for Exercises 2.43–2.47 (sd) Pdq 15 Gate ted (ps) NOT 10 2-input NAND 15 30 3-input NAND 25 2-input NOR 30 25 3-input NOR 45 35 2-input AND 30 25 3-input AND 40 30 2-input OR 40 30 3-input OR 55 45 2-input XOR 60 40
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Related Book For
Digital Design and Computer Architecture
ISBN: 978-0123944245
2nd edition
Authors: David Harris, Sarah Harris
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