Design an internal LFSR (XOR operation) with the following polynomial equation:

px=x10+x9+x7+x4+x3+x2+x1+1

Draw the structure of LFSR, write its Verilog code. Determine the clock by clock output of LFSR when total 5 clocks are applied. Assume that the following initial value loaded in the LFSR : 1 0 1 0 1 0 1 0 1 1