A low-power Schottky TTL logic circuit is shown in Figure P17.40. Assume a transistor current gain of

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A low-power Schottky TTL logic circuit is shown in Figure P17.40. Assume a transistor current gain of $\beta=30$ for all transistors.

(a) Calculate the maximum fanout for $v_{X}=v_{Y}=3.6 \mathrm{~V}$.

(b) Using the results of part (a), determine the power dissipated in the circuit for $v_{X}=v_{Y}=3.6 \mathrm{~V}$.

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Microelectronics Circuit Analysis And Design

ISBN: 9780071289474

4th Edition

Authors: Donald A. Neamen

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Question Posted: May 09, 2024 01:01 PM

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A low-power Schottky TTL logic circuit is shown in Figure P17.40. Assume a transistor current gain of

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10 10 Figure P17.40 15 www Q2 SV 4.1 10 Q4 23 4.0 45

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Microelectronics Circuit Analysis And Design

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