For the class-B output stage shown in Figure P8.24, the bias voltages are (V^{+}=12 mathrm{~V}) and (V^{-}=-12

Question:

For the class-B output stage shown in Figure P8.24, the bias voltages are \(V^{+}=12 \mathrm{~V}\) and \(V^{-}=-12 \mathrm{~V}\). The load resistance is \(R_{L}=50 \Omega\), and the transistor parameters are \(V_{T N}=V_{T P}=0\) and \(K_{n}=K_{p}=4 \mathrm{~mA} / \mathrm{V}^{2}\).

(a) Plot \(v_{O}\) versus \(v_{I}\) for \(-10 \leq v_{I} \leq+10 \mathrm{~V}\).

(b) What is the voltage gain, \(A_{v}=d v_{O} / d v_{I}\), at (i) \(v_{I}=0\), (ii) \(v_{I}=1 \mathrm{~V}\), and (iii) \(v_{I}=10 \mathrm{~V}\) ?

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