Part $1$:

Simulate the RISC$-$V single$-$cycle data path implementation that you have designed through previous lab

sessions $($lab$1-$lab$3)$ by writing RISC assembly code to test its functionality. Consider the following two

points when writing your code:

At least one instruction from each instruction's type should be included in the code.

At least two BEQ instructions should be included in the code, one should be taken and the

other should not be taken.

Part $11$:

A new instruction named NewAdd has the R$-$Type format and operates as follows:

NewAdd R$[$rd$],$ R$[$rs$1],$ R$[$rs$2]$

$IF(R[rs1]+410)$

Then $(R[rd]=R[rs2]+10)$

Else $(R[rd]=R[rs1]$ XOR $24)$

$($Note: Apply logic XOR bitwise with binary value of $24)$

Modify your RISC single$-$cycle data path to support the new instruction in addition to the

existing instructions. Use the unused opcode ${1101}_{?}$

Include the new instruction in the code written in parti $($make sure that it has an effect on

the registers values$).$

Simulate your modified design. You should use the new instruction twice to cover both

cases.

Write proper comments that explain the effect of the new instruction on the register file

value on a separate sheet.