Questions and Answers of Essentials Of Computer Organization

Suppose your company has decided that it needs to make certain busy servers 30% faster. Processes in the workload spend 70% of their time using the CPU and 30% on I/O. In order to achieve an overall
Explain how programmed I/O is different from interrupt-driven I/O.
Suppose that you are designing a game system that responds to players’ pressing buttons and toggling joysticks. The prototype system is failing to react in time to these input events, causing
Suppose that you are designing an electronic musical instrument. The prototype system occasionally produces off-key notes, causing listeners to wince and grimace. You have determined that the cause
How are address vectors used in interrupt-driven I/O?
Your friend has just bought a new personal computer. She tells you that her new system runs at 1GHz, which makes it more than three times faster than her old 300MHz system. What would you tell her?
How does direct memory access (DMA) work?
Suppose the daytime processing load consists of 60% CPU activity and 40% disk activity. Your customers are complaining that the system is slow. After doing some research, you learn that you can
Why does DMA require cycle stealing?
Amdahl’s Law is as applicable to software as it is to hardware. An oft-cited programming truism states that a program spends 90% of its time executing 10% of its code. Thus, tuning a small amount
What does it mean when someone refers to I/O as bursty?
Name the four types of I/O architectures. Where are each of these typically used, and why are they used there?
How is channel I/O different from interrupt-driven I/O?
A generic DMA controller consists of the following components:° Address generator ° Address bus interface ° Data bus interface ° Bus requestor Interrupt signal circuits ° Local peripheral
A CPU with interrupt-driven I/O is busy servicing a disk request. While the CPU is midway through the disk-service routine, another I/O interrupt occurs. a. What happens next? b. Is it a
How is channel I/O similar to DMA?
Of programmed I/O, interrupt-driven I/O, DMA, or channel I/O, which is most suitable for processing the I/O of a: a. Mouse b. Game controller c. CD d. Thumb drive or memory stickExplain your
What distinguishes an asynchronous bus from a synchronous bus?
Why are I/O buses provided with clock signals?
What is settle time, and what can be done about it?
If an address bus needs to be able to address eight devices, how many conductors will be required? What if each of those devices also needs to be able to talk back to the I/O control device?
Why are magnetic disks called direct access devices?
Explain the relationship among disk platters, tracks, sectors, and clusters.
We pointed out that I/O buses do not need separate address lines. Construct a timing diagram similar to Figure 7.11 that describes the handshake between an I/O controller and a disk controller for a
What are the major physical components of a hard disk drive?
What is zoned-bit recording?
What is seek time?
Define the terms seek time, rotational delay, and transfer time. Explain their relationship.
What is the sum of rotational delay and seek time called?
Why do you think the term random access device is something of a misnomer for disk drives?
Verify the average latency rate cited in the disk specification of Figure 7.15. Why is the calculation divided by 2?Figure 7.15. CONFIGURATION: Formatted capacity, TB Integrated controller Encoding
Why do differing systems place disk directories in different track locations on the disk? What are the advantages of using each location that you cited?
Explain the differences between an SSD and a magnetic disk.
By how much is an SSD faster than a magnetic disk?
What is short stroking, and how does it affect the relative cost per gigabyte of SSDs?
Suppose a disk drive has the following characteristics:° Four surfaces ° 1024 tracks per surface ° 128 sectors per track ° 512 bytes/sector ° Track-to-track seek time of 5ms ° Rotational
How do enterprise SSDs differ from SSDs intended for laptop computers?
What is wear leveling, and why is it needed for SSDs?
Suppose a disk drive has the following characteristics: ° Six surfaces ° 16,383 tracks per surface ° 63 sectors per track ° 512 bytes/sector ° Track-to-track seek time of 8.5ms °
What is the name for robotic optical disk library devices?
What is the acronym for computer output that is written directly to optical media rather than paper or microfiche?
What are the advantages and disadvantages of having a small number of sectors per disk cluster?
Magnetic disks store bytes by changing the polarity of a magnetic medium. How do optical disks store bytes?
How does the organization of an optical disk differ from the organization of a magnetic disk?
How is the format of a CD that stores music different from the format of a CD that stores data? How are the formats alike?
How does the organization of an SSD differ from a magnetic disk? How are they similar to a disk?
Why are CDs especially useful for long-term data storage?
Do CDs that store data use recording sessions?
Explain wear leveling and why it is needed for SSDs. We said that wear leveling is important for the continual updating of virtual memory pagefiles. What problem does wear leveling aggravate for
How do DVDs store so much more data than regular CDs?
Explain why Blu-ray discs hold so much more data than regular DVDs.
Name the three methods for recording WORM disks.
You have a need to archive a large amount of data. You are trying to decide whether to use tape or optical storage methods. What are the characteristics of this data and how it is used that will
Why is magnetic tape a popular storage medium?
Our discussion of RAID is biased toward consideration of standard rotating magnetic disks. Is RAID necessary for SSD storage? If not, does this make SSD storage slightly more affordable for the
A RISC processor has 186 total registers, with 18 globals. There are 12 register windows, each with 10 locals. How many input/output registers are in each register window?
Explain the difference between loosely coupled and tightly coupled architectures.
Which model, VLIW or superscalar, presents the greater challenge for compilers? Why?
What is the difference between UMA and NUMA?
Describe write-through and write-back cache modification as they are used in shared memory systems and the advantages and disadvantages of both approaches.
Use the FPGA illustrated below to implement a full adder. Label the outputs clearly. Draw lines between the cells to indicate a connection between the logic functions. X y Carry in Description B
Should the memory of a dataflow system be associative or address based? Explain.
Why is virtual memory not often used in embedded systems?
Why is the prevention of memory leaks so important in embedded systems?
What is a price–performance ratio? What makes it hard to apply?
What advantages would there be to using both subsystems and logical partitions on the same machine?
Which RAID levels offer the best economy while providing adequate redundancy?
Which RAID level uses a mirror (shadow) set?
a. Which of the RAID systems described in this chapter cannot tolerate a single disk failure? b. Which can tolerate more than one simultaneous disk failure?
What are hybrid RAID systems?
What is the significance of the superparamagnetic limit?
What does the superparamagnetic limit mean for disk drives?
Explain how holographic storage works.
What is the general idea behind MEMS storage?
How does CNT storage work?
What is a memristor, and how does it store data?
Why was the RISC architecture concept proposed?
Why do RISC machines operate on registers?
Which characteristics of RISC systems could be directly implemented in CISC systems? Which characteristics of RISC machines could not be implemented in CISC machines (based on the defining
Why is a RISC processor easier to pipeline than a CISC processor?
Describe how register windowing makes procedure calls more efficient.
What does the “reduced” in reduced instruction set computer really mean?
Flynn’s taxonomy classifies computer architectures based on two properties. What are they?
Suppose a RISC machine uses overlapping register windows with:° 10 global registers ° 6 input parameter registers ° 10 local registers ° 6 output parameter registers How large is each
What is the difference between MPP and SMP processors?
We propose adding a level to Flynn’s taxonomy. What is the distinguishing characteristic of computers at this higher level?
A RISC processor has 152 total registers, with 12 designated as global registers. The 10 register windows each have 6 input registers and 6 output registers. How many local registers are in each
Do all programming problems lend themselves to parallel execution? What is the limiting factor?
Define superpipe lining.
Suppose a RISC machine uses overlapping register windows for passing parameters between procedures. The machine has 298 registers. Each register window has 32 registers, of which 10 are global
How is a superscalar design different from a superpipe lined design?
When one process stops using the CPU and another process begins, we call that a context switch. It requires all of the information about the currently executing process to be saved, including the
Suppose a friend has asked you to help him make a choice as to what kind of computer he should buy for his personal use at home. What would you look for in comparing various makes and models? How is
In what way does a VLIW design differ from a superpipelined design?
Suppose that a RISC machine uses five register windows.a) How deep can the procedure calls go before registers must be saved in memory? (That is, what is the maximum number of “active” procedure
What are the similarities and differences between EPIC and VLIW?
In Flynn’s taxonomy:a) What does SIMD stand for? Give a brief description and an example. b) What does MIMD stand for? Give a brief description and an example.
Explain the limitation inherent in a register-register vector processing architecture.
Flynn’s taxonomy consists of four primary models of computation. Briefly describe each of the categories and give an example of a high-level problem for which each of these models might be used.
Give two reasons for the efficiency of vector processors.

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